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an10829 ssl2101 dimmable high ef ficiency flyback design rev. 3 ? 22 june 2011 application note document information info content keywords ssl2101, led driver, mains dimmable, triac dimmer, flyback abstract this application note describes a simple and highly efficient flyback converter application design for low output power.
an10829 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2011. all rights reserved. application note rev. 3 ? 22 june 2011 2 of 22 nxp semiconductors an10829 ssl2101 dimmable high efficiency flyback design revision history rev date description v.3 20110622 modifications: ? text updated ? template upgraded to latest version ? all illustrations upgraded to new quality standards ? section 6 ? legal information ? amended to include new items v.2 20091016 - v.1 20090927 first issue
an10829 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2011. all rights reserved. application note rev. 3 ? 22 june 2011 3 of 22 nxp semiconductors an10829 ssl2101 dimmable high efficiency flyback design 1. introduction the ssl2101 ic is des igned for controlling mains dimmabl e leds. this application note describes a design for a simple and highly efficient flyback converter application for low output power. 1.1 application requirements the application described in this note is a retrofit application using a lamp within the existing infrastructure. it targets the lower end of the market, which has the following requirements: ? the lamp should be inexpensive. ? the lamp should be compact as the space in the pre-designed housing is limited. the maximum input power for this housing is 7 w. ? the driver should have a high efficiency with a target of 75 %. ? the lamp should be compatible with a triac dimmer, without noticea ble flicker or jumps on the output. transistor di mmer compatibility is optional. ? the input voltage is 230 v, 50 hz. 1.2 design choices the application requirements result in the following design decisions: ? to meet the low power and small form-factor requirement s, the design will be based on the ssl2101 ic. ? to meet the 7 w input and 75 % efficiency target, 4 white leds are chosen that are in series at the output and supplied with 400 ma current. ? a flyback converter design is used. usin g a schottky diode as a flyback diode will increase efficiency when compared to a buck design. an additional advantage is the electrical isolation of the leds from the mains supply, which means that a metal heat sink can be used to cool the leds. ? to improve efficiency, a third winding is used to generate v cc and also to detect any demagnetization of the transformer. this allows the application to run in boundary conduction mode, with low peak current through the transformer. ? the choice was made to only support triac dimmers as they require less components whereas transistor dimmers require their internal power generation to be fed, which reduces the efficiency of the application.
an10829 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2011. all rights reserved. application note rev. 3 ? 22 june 2011 4 of 22 nxp semiconductors an10829 ssl2101 dimmable high efficiency flyback design 1.3 ssl2101 ic the ssl2101 is essentially a switch mode power supply controller ic, based on the nxp starplug series. additional features are added to give the chip its primary function, a mains dimmable led driver. among these functions are the following: ? a logarithmic response at the control pin for the oscillator freq uency. this gives dimming leds a response comparable to dimming incandescent lighting. ? a current sensing pin to detect when the total application current is about to drop below the level required to keep the dimmer functioning correctly. this can then be used to switch on a resistive bleeder to maintain the current. ? two switches which control the bleeder circui t. this circuit is used to enable the dimmer to drive low-power applications. a block diagram of the ic is shown in figure 1 . the design decisions lead to the method in which these functionalities will be used. this is explained in section 2 . for more information on the ssl2101, data sheets and application notes can be found on the nxp web site. fig 1. block diagram of the ssl2101 isense sbleed wbleed bleeder supply logic protection logic oscillator frc overcurrent blank low freq stop short-winding protection thermal shutdown power - up reset pwm limit circuit valley drain aux source 100 mv 0.5 v 1.5 v v cc rc brightness rc2 pwmlimit gnd 019aaa816 3 4, 5,13, 14, 15 8 6 7 9 10 1 2 16 11 12
an10829 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2011. all rights reserved. application note rev. 3 ? 22 june 2011 5 of 22 nxp semiconductors an10829 ssl2101 dimmable high efficiency flyback design 2. designing the application the application is designed with the choices defined in section 1.2 . this chapter divides the application into its component parts. th e following sub-sections discuss the selection of components for these parts. th e circuit schematic is shown in figure 2 . 2.1 switched mode power supply (smps) in low power applications, dimensioning the smps plays both an important part for both efficiency and dimmer performance. the requirement for a low cost, small form-factor application further limits the choices for components. the single-stage convertor consis ts of two parts, shown in figure 3 . ? an ac-to-dc converter, consisting of a br idge rectifier and a capacitive buffer. ? a flyback dc-to-dc converter, consisting of a transformer with a switched primary side and a secondary with a flyback diode and buffer capacitor. fig 2. ssl2101 flyback circuit schematic (230 v triac only) 019aab286 2.7 k r9 2.4 r28 10 fusistor fr1 47 r1 v1 v 47 r2 d6 l1 2.2 mh 100 k r8 10 r6 d7 d3 d1 bridge rectifier vbuf vrectmains v cc 100 k r11 15 k r2 + r3 2 k r4 + r5 270 k d2 tvs400v c16 1 f c6 4.7 f c3 150 nf c6 4.7 f tx1 66 h c1 150 f c2 1 f leds leds r16 1.5 m r10 c7 330 pf u1 sbleed 116 drain wbleed 215 v cc 31 4 41 3 51 2 source brightness 61 1 aux rc2 pwmlimit vrectmains 71 0 isense rc 89 pwmlimit ssl2101 tx1 1600 h d5 zener 200 v d4 tx1 50 h fig 3. basic flyback converter 019aab287 drect1 drect2 dflyback drect4 drect3 lsec cbuffer sw voscillator cbuffer dledload lprim vmains
an10829 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2011. all rights reserved. application note rev. 3 ? 22 june 2011 6 of 22 nxp semiconductors an10829 ssl2101 dimmable high efficiency flyback design high efficiency requires the converter to run in boundary conduction mode (bcm). when using discontinuous conduction mode (dcm), the peak current through the switch and transformer have to be la rger for the same output power. this results in higher resistive losses and it requires a transformer with a larger i sat . alternatively, running in continuous conduction mode (ccm), the dissipation in th e switch increases due to switching losses. the switch used by the ssl2101 is not suitable for this mode of operation. choosing bcm adds to the complexity of the ap plication. additional circuitry is required to detect the boundary between ccm and dcm. the ssl2101 has a special input which can be used to detect the demagnet ization of the transf ormer core. this input is labeled ?aux? because this detection ca n be done using an auxiliary winding on the transformer. 2.1.1 ssl2101 flyback converter operation information on the convertor operation can be found in the ssl2101 data sheet and application note. the actual output power of the convertor is defined by equation 1 , where: ? = converter efficiency l p = primary inductance i p = primary peak current f = converter frequency (1) the required led power is 5.25 w. the conver tor efficiency is estimated at about 81 % for these low-power applicat ions. the other variables will be discussed in separate sections. 2.1.2 converter frequency for optimum efficiency, the application will be running in bounda ry conduction mode (bcm) in undimmed operation. the operating frequency of the convertor is not only determined by the oscillator rc values in this mode; rath er the maximum frequency is limited by both peak current detection an d demagnetization detection. the point where demagnetization is detected depends on: ? the inductance ? the primary peak current ? the turns ratio ? the ringing frequency of the transformer (d ue to the way demagnetization is detected, the oscillator is halted until a valley is detected) a target convertor frequency of 132 khz is selected for the following reasons: ? a relatively high frequency requires a lower inductance and/or peak current to transfer the same amount of power ? the convertor frequency must remain below 150 khz as electromagn etic interference (emi) regulations are more stringent above that frequency p ? 1 2 -- - l p i p 2 f ???? =
an10829 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2011. all rights reserved. application note rev. 3 ? 22 june 2011 7 of 22 nxp semiconductors an10829 ssl2101 dimmable high efficiency flyback design ? the convertor frequency must remain above the audible range even when the frequency reduces while the circuit is being dimmed. the convertor frequency also effects the efficiency of the converter and the required transformer size. the inductance and peak current are determined to achieve a frequency that provides a good balance of converter efficiency and transformer size. 2.1.3 primary peak current and primary inductance the smps primary switch is lo cated inside the ssl2101. this selection is made to eliminate the cost of an expensive high voltage low r ds(on) mosfet. the switch is optimized for the maximum ou tput power of the ic: 12 w for the ssl2101. the switch r ds(on) is typically 6.5 ? at 25 ? c junction temperature (t j ) and 9.0 ? at 100 ? c (t j ). the peak current through the inductor is very important. a high current causes high switching losses inside of the ic. as a result t j rises, the r ds(on) increases and the switch losses increase further. the peak current through the inductor depends on: ? the switch on-time ? the primary inductance ? the primary buffer voltage the ssl2101 detects this peak current by measuring the voltage drop over a shunt resistor on the source pin. the switch stops conducting 160 ns (typical) after the voltage level at the source pin crosses the 0.5 v threshold. this delay causes a higher actual peak current, especially with a high buffer voltage. a source resistor of 2.4 ? is used in the circuit which together with the delay and input voltage, leads to a maximum peak current of 0.26 a through the inductor. the primary inductance can be calculated with equation 2 , resulting from equation 1 . (2) using the values mentio ned in this section will result in a required primary inductance of 1.6 mh. 2.1.4 turns ratio a relatively high percentage of the power can be lost in the flyback diode, due to a low output voltage in relation to the diode fo rward voltage. a schottky diode has a lower forward bias voltage that would provide higher efficiency. however, high voltage schottky diodes have a relatively large forward bias voltage. increasing the transformer ratio reduces the secondary reverse voltage. the maximum turns ratio is limited by the minimum buffer voltage, the maximum switch voltage and the required output voltage. fo r this application, the output voltage is determined by the number of leds in series, the current through the leds, and the forward voltage over the flyback diode. the es timated required output voltage is 13.2 v. it is estimated that the buffer voltage on the pr imary side can go as low as 80 v as a result of the buffer capacitance, the load and th e sinusoidal mains voltage. consequently, the winding ratio must be smaller than 6.06 : 1 to be able to generate a constant output voltage, and a turns ratio of 6 : 1 is selected . this results in a maximum reverse voltage of 67 v on the flyback diode. l p 2p in ? ?? i p 2 f ? ?? ? =
an10829 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2011. all rights reserved. application note rev. 3 ? 22 june 2011 8 of 22 nxp semiconductors an10829 ssl2101 dimmable high efficiency flyback design the transformer specification is discussed in section 2.1.6 . details relating to oscillator frequency and duty-factor modification to achieve dimming can be found in section 2.5 . 2.1.5 v cc generation the ssl2101 has an integrated voltage regulator that generates the 5 v supply voltage (v cc ) required to drive the logic and the switches. this regulator is either powered from the v cc pin or from the drain pin and switching between the two is done internally. the regulator is usually powered by the drain pin voltage during startup. however, if the v cc is powered from the drain pin during no rmal operation, approximately 600 mw is dissipated in the ic: this reduces the applicat ion efficiency and possibly the lifetime of the ic. it is advisable to feed the v cc regulator from the v cc pin during normal operation. the voltage on the v cc pin should be between 10.75 v and 40 v. from an efficiency perspective, it is ben eficial to keep the v cc voltage low to minimize the regulator dissipation. in this high efficiency design, the auxiliary winding is used to generate v cc . during a second stroke, the maximum voltage on the secondary winding is limited by the voltage on the output buffer capacitor. furthermore, the v cc buffer voltage is equal to the output voltage multiplied by the turn s ratio between the secondary and auxiliary windings. four white leds are placed in series, which results in a total forward voltage of 12.5 v. this is already sufficient for the v cc pin. for safety reasons, the out put is isolated from the input, so v cc cannot be drawn from the output buffer. a diode-capacitor buffer similar to the output buffer is placed on the au xiliary winding to generate the v cc supply. the exact number of turns on the auxiliary winding is not critical for demagnetization detection as long as the minimum voltage requirement is reached. it can be selected for optimal v cc generation. if the auxiliary winding has an equal amount of turns, then v cc would be equal to 13 v when the application is connected to mains. however, the current through the leds is reduced when the application is dimmed. this results in a lower forward bias voltage, which could drop below the required 10.75 v minimum startup voltage. remark: the voltage on the drain pin can sometimes still take over during deep dimming, as the buffered voltage will be lower. this is not optimal however, and requires the number of auxiliary turns to be increased. from an efficiency point of vi ew, the number of auxiliary turn s should not be much larger than that of the secondary winding, as the difference between the v cc pin voltage and the 5v v cc is dissipated. a turns ratio of 1 : 1.2 se condary to auxiliary is used. it is still required to have a small 10 ? resistor in series wi th the buffer diode, to filter the voltage peak due to leakage induction. remark: for detailed information on optimizing the v cc generation circuit, refer to the application note an10754 : ssl2101 and ssl2102 dimmable mains led driver.
an10829 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2011. all rights reserved. application note rev. 3 ? 22 june 2011 9 of 22 nxp semiconductors an10829 ssl2101 dimmable high efficiency flyback design 2.1.6 transformer specification the application design is based around an effi cient transformer, t he specifications of which are as follows: ? core size e16/efd16. ? primary: 1600 ? h, 54 turns, 0.25 mm wire. ? secondary: 44 ? h, 9 turns, 2 ? 0.315 mm wire. ? auxiliary: 54 ? h, 10 turns, 0.1 mm wire. the required transformer air-gap depends on the properties of the core and core material.the magnetic field strength must be calculated and checked with core material properties in order to avoid saturation. to achieve this, the core size and the turns count are balanced. a double secondary wire can be used to reduce both skin-effect and resistive losses. the proximity losses do no t increase, because the wires can run next to each other without increasing the layer thi ckness. to reduce leakage induction, the secondary winding can be sandwiched between tw o layers of primary windings. fringing field losses can be reduced by avoiding windings near the air-gap. 2.2 input and output buffer the mains ac input is sinusoidal. once rectif ied, it still has a zero-cross point where no power is available for the convertor. to bridge the gap, it is required to use a buffer. the total buffer capacitance required for the specif ied output current ripple can be divided over the input and the output circuit: ? when the primary buffered voltage drops, the current into the inductor rises to keep the power constant. a large primary capacitor results in a small ripple on the primary buffered voltage and thus a lower peak current through the switch and inductor. this will both save space, as a sm aller transformer can be used , and increase efficiency as a result of lower resistive losses in the s witch and transformer. unfortunately, a large primary capacitance also results in a lower power factor (~0.7). ? reducing the primary buffer capacitance improves the power factor. as the capacitance is now used purely to filter the converter currents, the input current follows the rectified mains vo ltage. the resultant power factor can be in the order of 0.98. however, the output current will also follow the input voltage. this results in a 100 hz modulation which, when combined with other modulated sources, can become visible and provide a less effect ive utilization of the attached leds. to compensate for this, a large output capacitor must be used to average the current. as a result, the peak cu rrent through the inductor will be 41 % or larger, at the rated output, which requires a bigger transformer. when a triac dimmer is used, sizing the input buffer becomes more complex, as the triac inside the dimmer responds to the current being drawn by the circuit. a triac can be seen as a bidirectional thyristor. this device requ ires a minimum current to start conducting, or ?ignite?, and a minimum current to remain conducting: these are referred to as the ?latching current? and the ?hold current?. ? when a high primary buffer capacitance is used, the buffered voltage can be higher than the trigger voltage of the triac. this will result in insufficient latching current and the triac will not fully ignite. the triac output voltage will follow the buffered voltage
an10829 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2011. all rights reserved. application note rev. 3 ? 22 june 2011 10 of 22 nxp semiconductors an10829 ssl2101 dimmable high efficiency flyback design until the difference between the mains voltage and buffered voltage is again equal to the trigger voltage. at that moment the tr iac fully ignites and an example of such a situation is provided in figure 4 . ? when a small primary capacitance is used, the buffer is charged by a short current pulse after which the current drops below the minimum hold current and the triac switches off. however, the buffer capacitor is quickly drained and the buffer diode starts conducting again. this results in the triac reigniting, which is also referred to as ?multiple firing?. an example of this is provided in figure 5 . fig 4. improper triac latching resulting from a large buffer capacitance 019aab288
an10829 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2011. all rights reserved. application note rev. 3 ? 22 june 2011 11 of 22 nxp semiconductors an10829 ssl2101 dimmable high efficiency flyback design in this design the dimmer position is determi ned by taking the mean value of the rectified input voltage. both of the a bove mentioned effects will influe nce this value. in the best case this results in a step in the output, as a triac goes from normal to abnormal operation. however, this jump could set the triac back to normal operation, which in turn then jumps back to the abnormal mode and so on. this unstable situatio n results in an oscillation (visible) in the outp ut current, referred to as ?flickering?. abnormalities in dimmer operat ion should be avoided as much as possible, to reduce the chance of flickering. to avoid this, the ssl2101 has a bleeder circuit. this is discussed in section 2.3 . in this design, a 1 ? f electrolytic capacitor is combin ed with a 150 nf (film) capacitor to handle peak currents. this gives a good balance between dimmability and efficiency. however, the value of the damping resistor al so plays a large part. this is discussed in section 2.4 . encapsulated film capacitors are used to reduce audible noise to a minimum. 2.3 bleeder circuit. triac dimmers are designed for high power loads, usually in the order of 40 w to 600 w. all internal circuitry is optimi zed for these loads. when a load with a lower power rating is connected, the dimmer often behaves abnorma lly, switching on and off at unpredictable times. placing a resistive load in parallel to dissipate the minimum required power could remove this problem. but as high efficiency is almost always a target, that would not be an option. this problem can be solved by properly loading the triac dimmer at the right times. fig 5. multiple firing resulting from a small buffer capacitance 019aab289
an10829 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2011. all rights reserved. application note rev. 3 ? 22 june 2011 12 of 22 nxp semiconductors an10829 ssl2101 dimmable high efficiency flyback design to summarize, the triac requires a minimum current to latch and a minimum current to hold. additionally, a higher (minimum) current is required to reset the dimmer?s internal timing circuit around zero-crossing of the mains voltage. ? in the ssl2101 design, the triac latching current mainly consists of the charging current of the primary buffer capacitor. because this is finite, the higher the current the shorter the latching time becomes, and vice versa. this current has to be above a certain minimum value. however, in power consumption terms, there is an optimum balance between a low and high current. the strong bleeder can also contribute and this is discussed in section 2.3.1 . ? the minimum hold current that is required, differs between triac types and between dimmer positions. approximately 20 ma of hold current should be drawn to ensure every triac stays latched in normal operation. however, because the charging of the buffer capacitor usually happens in a single small current pulse, the 20 ma has to be drawn another way. this can be done with a current source or, as is the case for the ssl2101, by switching on a weak bleeder resistor. ? a triac conducts when triggered by a rc-circuit inside the dimmer. the weak bleeder resistor used for the ssl2101 is insufficient to charge this rc-cir cuit, so for voltages below 54 v, a 2 k ? strong bleeder resistor takes over. the ssl2101 circuit incl udes all the facilities to suppor t triac dimmers. dimensioning of the buffer was previously discussed in section 2.2 and the strong bleeder resistor is 2 k ? for almost every application, however, it is mo re difficult to select the right value for the weak bleeder resistor. this is discussed in section 2.3.1 . 2.3.1 dimensioning the weak bleeder resistor the internal ssl2101 ic switch can handle a maximum current of about 14 ma. for some triac dimmers this is not a sufficient hold current and the dimmer reacts by switching off. when the triac dimmer switches off, the voltage does not immediately drop to zero; instead the voltage drops slowly. additionally, when the triac switches off this way, the timing circuit inside the dimmer is not rese t properly. because the timing circuit and the brightness circuit then become mutually depend ent, this often results in flickering. an example is shown in figure 6 . the first two phases in figure 6 show the triac igniting a second time (multiple firing).
an10829 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2011. all rights reserved. application note rev. 3 ? 22 june 2011 13 of 22 nxp semiconductors an10829 ssl2101 dimmable high efficiency flyback design the hold current can be increased by means of an external transistor, which is controlled by the wbleed pin. however, to maximize efficiency, another solution is used. the hold current is removed altogether and as a result the triac always switches off in the same predictable way. this result s in consistent behavior. a weak bleeder resistor still has to be present to de tect the rectified in put voltage level. this reference voltage is used to detect the 54 v switch level for the st rong bleeder. if this is not detected, the strong bleeder switch st ays on for the whole phase. this could cause damage to both the strong bleeder switch and resistor. the value of the weak bleeder resistor can be used to control the switching point of the strong bleeder: ? a larger weak bleeder resistor delays the s witching moment. if it is too large, the strong bleeder switch and resist or become over-stressed again. ? a smaller weak bleeder resistor advances th e switching moment. if it is too small, the unstable situation due to an insufficient hold current, reoccurs (see figure 6 ). in this application, the isense pin is connec ted to ground, which means the weak bleeder switch is always on (except when the strong bleeder takes over). the selected resistor value is 270 k ? which provides a good balance be tween the issues explained above. fig 6. output current oscillation result ing from insufficient hold current 019aab290
an10829 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2011. all rights reserved. application note rev. 3 ? 22 june 2011 14 of 22 nxp semiconductors an10829 ssl2101 dimmable high efficiency flyback design 2.4 damper circuit the damper circuit limits the in-rush current a nd it damps oscillations due to the inductive and capacitive elements inside the dimmer and the mains network. the in-rush current is a high current peak that occurs on two occasions: ? when the buffer capacitors are not charged a nd the application is connected to a high voltage source, the current is only limited by the parasitic resistance equivalent series resistance (esr) of the capacitors. the resultant current peak is very high and could damage components or blow a fuse. ? when the application is connected to a triac dimmer, this peak occurs every phase. however, the dimmer's internal components (a large output inductor and the triac on-resistance) now limit the current. because of the importance of low cost and sma ll size in this application, a series damping resistor is chosen to limit th e current. the major disadvantage of this damping resistor is that all the current passes through it, resulting in a continuous and unnecessary power loss. the resistance of a damper is important for dimmability. when the charging current of the primary capacitors is limited, the charging time increases. as a result, the charging current also contributes to the ho ld current for the triac. ? if the damping resistor is too large, the power loss will be unnecessarily large and it can also cause triac latching issues due to insufficient latching current. ? if the damping resistor is too small, there will be a switch-on oscillation of the current. after an initial peak, the current will reduce shortly to a very low level that can be below the hold current of the triac. the triac will either not latch properly if the peak is too short or it will re-open becaus e the hold curren t is not present. ? if the damping resistor is too small, th e inrush current can become excessive, especially when connected to a triac dimm er with a duty factor just over 50 %. because the buffer capacitor is only charged during a short current peak, it is not fully charged. consequently, the triac switches off due to insufficient hold current before the input voltage has finished rising. however, the difference between the mains and buffered voltage is not sufficient for the di mmer to reignite until the end of the cycle. multiple firing occurs, which can be seen in figure 7 . this figure also shows the moment when the triac latching is again in consistent, which can re sult in flickering. the problem increases for larger dimmer duty factors, as can be seen in figure 8 .
an10829 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2011. all rights reserved. application note rev. 3 ? 22 june 2011 15 of 22 nxp semiconductors an10829 ssl2101 dimmable high efficiency flyback design fig 7. unpredictable dimmer behavior due to insufficient damping 019aab291 fig 8. advanced state of multiple fi ring due to insu fficient damping 019aab292
an10829 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2011. all rights reserved. application note rev. 3 ? 22 june 2011 16 of 22 nxp semiconductors an10829 ssl2101 dimmable high efficiency flyback design the dissipation in the damping resistor is rela ted to the time and amplitude of the inrush current. the inrush current is related to the charge of the input buffer capacitance. finally, the buffer capacitance is related to the lamp power. larger lamp powers require a larger capacitor to store sufficient energy. because dimmer performance is very importan t, the value of the damping resistor is optimized for triac dimmers. a single resistor is only feasible for po wer levels below 12 w. above this output power, too much power is lost in the damper and other solutions are required. the solutions could be a combination of a serial and a parallel damper or an active damper that bridges the serial damper when the inrush current peak has passed. for this application a damping resistor value of approximately 100 ? is selected. this resistor is placed before the rectifier and it is evenly distributed using a 47 ? resistor in each path. 2.4.1 active damper this section describes a low power active dampi ng circuit. only a small amount of power is lost in the damping resistor. when the output power requirements increase, so does the input current. as stated by ohm's law, the powe r lost in the resistor is the square of the current through the resistor divided by it s resistance. however, the maximum inrush current will become too large if the value of the resi stor is reduced. an active damper links the resistance of the damper to the current through the application. during normal use with a small current (conne cted to mains for example), the resistance is low. when a peak current occurs, the resistance is increased. the aim is to limit the current to a maximum value which can be achieved with a current source. an example can be seen in figure 9 . ? the mosfet is turned on as long as its gate voltage is larger than its source voltage v r1 plus the threshold voltage v t , so that the 100 ? resistor is bypassed and the 3.3 ? resistor only is used as a damper. ? the mosfet exits saturation and turns off when the current increases to the point where the voltage at the source reaches the threshold (v r1 + v t ) > v1. as a result, the total damping resistance is increased to a maximum of 103.3 ? (r1 + r2). the following extra components, required fo r the active damper, increase the costs: ? a reference voltage generation circuit, a z ener diode for example. this diode can be powered via a resistor from the buffered rectified mains. fig 9. block diagram for the active damping circuit. 019aab293 r2 100 m1 nmos v1 r1 3.3 system vinput
an10829 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2011. all rights reserved. application note rev. 3 ? 22 june 2011 17 of 22 nxp semiconductors an10829 ssl2101 dimmable high efficiency flyback design ? a transistor is required to limit the cu rrent. mosfets are preferred, but quite expensive. a standard npn transistor has the problem that it requires a relatively large base current which makes it more difficult to design an efficient reference voltage generator. a darlington transistor is preferred but a thyristor that resets every phase can also be used. ? the transistor will have to be able to handle a high vo ltage and considerable power dissipation both of which increase the price and size of the transistor. 2.5 oscillator and dimming curve the ssl2101 has multiple inputs that can be used to control the output: ? the brightness pin controls the oscilla tor frequency. the ma ximum and minimum frequency is determined by the external resistors and the capacitor connected to the rc and rc2 pins. ? the pwmlimit pin controls the duty factor of the oscillator. the maximum duty factor is 75 %. ? the voltage on the source pin is used to limit the maximum current through the inductor. the switch is opened when the pin reaches a threshold level of 0.52 v. ? the aux pin can be used to detect demagnetization of the inductor. the oscillator is halted as long as the pin voltage is higher than 100 mv. the human eye interprets light intensity in a logarithmic way. the light intensity has to be reduced by approximately 80 % for the eye to se e it as half the previous brightness. the ssl2101 has an internal brightness curve circui t that compensates for this. this curve is shown in figure 10 . the brightness curve is created using two logarithmic curves. the transition between the curves can be noticeable when t he output is only controlled by the brightness voltage. the output current never reaches zero when the br ightness voltage is reduced, so the lamp remains on. fig 10. brightness curve v brightness (v) 0 2.5 2.0 1.0 1.5 0.5 019aab294 0.4 0.8 1.2 f osc (norm) 0 f max f min
an10829 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2011. all rights reserved. application note rev. 3 ? 22 june 2011 18 of 22 nxp semiconductors an10829 ssl2101 dimmable high efficiency flyback design the pwmlimit pin is another input that is mainly used for output current control. the pwmlimit does not have a logarithmic dimming curve, so the switch close time reacts linearly to changes in pwmlimit voltage. as a result, the output power increases squarely with a flyback topology or proportionally with a buck topology. a fully logarithmic dimming curve that goes fr om 0 % to 100 % can be made by combining the pwmlimit and brightness voltage. the most important factor in determining the correct combination is the va lue of the rc components. the convertor switch on-time, controlled by the pwm limit, is not proportional to the frequency. when the frequency is increased, the pwm limit curve becomes much steeper. when the rc values are set by a 330 pf capacitor and a 100 k ? resistor for the lower frequency, and a 2.7 k ? resistor for the higher frequency, the pwmlimit and brightness pins can be connected together to create an acceptable logarithmic dimming curve. the resultant curve can be seen in figure 11 . when the input exceeds 1.7 v, the output current is clipped by the i peak limit and demagnetization detection. as a result, the circuit required to control the pins can be minimal with a cost-effective voltage divider for the rectified input voltage. ? a 15 k ? resistor to ground is selected to generate an offset voltage. both pins have an internal 20 ? a current source, which result in a 0.6 v voltage drop over the resistor. a 1 ? f capacitor in parallel to this resistor is sufficient to average the input voltage. choosing a value that is too large, will result in a slow dimmer response. ? a 1.5 m ? resistor from the rectified input voltage gives the correct voltage range for the pins connected to mains voltage. this me ans that the control voltage is already in the clipping range. this is required to compensate for the lower maximum average voltage when the dimmer is supplied via a dimmer instead of being connected directly to the mains. it is very important that the control signal pcb tracks do no t pick up any noise from the high power tracks on the pcb. even small voltage variations can be noticed on the output, especially in the steep part of the curve. this has to be taken into account when laying out the pcb. a small capacitor (~100 pf) can be pl aced near the input pins for extra filtering. fig 11. the combined bri ghtness/pwmlimit curve v in (v) 0.8 2.0 1.6 1.2 019aab295 40 60 20 80 100 i out (%) 0
an10829 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2011. all rights reserved. application note rev. 3 ? 22 june 2011 19 of 22 nxp semiconductors an10829 ssl2101 dimmable high efficiency flyback design 3. circuit performance 3.1 measurement results the circuit is based on the ssl2101 flyback refe rence design that is modified to represent the schematic shown in figure 2 . the board is attached to 4 leds connected in series to the output and to the 230 v, 50 hz mains on the input. the following input and output parameters are compared: ? input voltage - 230 v rms ? input current - 43.9 ma rms ? input real power - 6.87 w ? input apparent power - 10.1 va ? input power factor - 0.693 ? output voltage - 12.5 v rms ? output current - 431 ma rms ? output power - 5.37 w (power factor ~1) ? efficiency - 78 % the target and efficiency requirements are met and exceeded. the quality of the transformer and schottky diode play an important factor in this achievement. dimmer performance is an important requirement for the application. no oscillations were observed on the eight dimmers that were tested which are listed in the first column of ta b l e 1 . the numbers in the table show the minimum and maximum output currents in ma. dividing the two values produces the dimming ratio. remark: all the dimmers listed are leading edge tr iac dimmers. for transistor dimmers other circuitry is required 3.2 circuit issues the selection of the primary buffer capacity is based on a balance between dimmability and efficiency. however, some triac dimmers will not fully latch for ve ry high dimmer duty factors. the latching current is not sufficient, as described in section 2.2 , and it results in the situation shown in figure 4 . table 1. triac dimming ratio for multiple dimmers dimmer i min (ma) i max (ma) ratio opus 852.390 7.0 421 1 : 60 opus 852.392 4.8 425 1 : 89 busch 2250 u 3.0 418 1 : 139 busch 2247 u 3.3 427 1 : 129 gira 1184 00/i00 14.2 427 1 : 30 everflourish efo700da 8.9 427 1 : 48 be t39.01 0.0 421 1 : infinity drespa prim?r 815 15.7 423 1 : 27
an10829 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2011. all rights reserved. application note rev. 3 ? 22 june 2011 20 of 22 nxp semiconductors an10829 ssl2101 dimmable high efficiency flyback design one solution to increase the latching current, is to add an rc damper/bleeder on the input (before the rectifier). the capacitor draws an additional current peak for triac ignition, limited by the series resistor. this solution has two main disadvantages, two extra high voltage components are required and power is lost in the resistor. for th is reason it is not used in this application. the issue is solved by changing the dimming curve. the improper latching current has little effect on the buffered mains voltage. once the triac is properly latched, the buffered voltage goes to the same maximum value of the mains. the jump is caused by a drop in the average voltage, which is used to dete rmine the brightness and pwm duty factor upper limit. as this issue only occurs with high dimmer duty factors, these values are already at, or above, their maximum. in this application, the dim curve is shifted to resolve this issue. consequently, the brightness and pwm limit voltage values are out of their control range. in this way, the frequency and duty factor limits do not change due to the jump and the output stays the same. 4. conclusion this document discussed a design for a 7 w ssl2101 application. the design is based on application requirements which include a 7 w maximum input power, a minimum of 75 % efficiency and low cost. a flyback topolo gy running in boundary conduction mode was chosen. the design choices that were ma de to achieve the target requirements are explained, including several issues regarding triac dimmer operation. the resultant design offers a 78 % efficiency rating, while mainta ining dimmer compatib ility at power levels below the dimmer rating. 5. references [1] an10754 - ssl2101 and ssl2102 dimmable mains led driver [2] um10341 - ssl2101 12w mains dimmable led driver
an10829 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2011. all rights reserved. application note rev. 3 ? 22 june 2011 21 of 22 nxp semiconductors an10829 ssl2101 dimmable high efficiency flyback design 6. legal information 6.1 definitions draft ? the document is a draft versi on only. the content is still under internal review and subject to formal approval, which may result in modifications or additions. nxp semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall hav e no liability for the consequences of use of such information. 6.2 disclaimers limited warranty and liability ? information in this document is believed to be accurate and reliable. however, nxp semiconductors does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information. in no event shall nxp semiconductors be liable for any indirect, incidental, punitive, special or consequential damages (including - without limitation - lost profits, lost savings, business interruption, costs related to the removal or replacement of any products or rework charges) whether or not such damages are based on tort (including negligence), warranty, breach of contract or any other legal theory. notwithstanding any damages that customer might incur for any reason whatsoever, nxp semiconductors? aggregate and cumulative liability towards customer for the products described herein shall be limited in accordance with the terms and conditions of commercial sale of nxp semiconductors. right to make changes ? nxp semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice. this document supersedes and replaces all information supplied prior to the publication hereof. suitability for use ? nxp semiconductors products are not designed, authorized or warranted to be suitable for use in medical, military, aircraft, space or life support equipment, nor in applications where failure or malfunction of an nxp semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmental damage. nxp semiconductors accepts no liability for inclusion and/or use of nxp semiconductors products in su ch equipment or applications and therefore such inclusion and/or use is at the customer?s own risk. applications ? applications that are described herein for any of these products are for illustrative purpos es only. nxp semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. nxp semiconductors does not accept any liability related to any default, damage, costs or problem which is based on a weakness or default in the customer application/use or the application/use of customer?s third party customer(s) (hereinafter both referred to as ?application?). it is customer?s sole responsibility to check whether the nxp semiconductors product is suitable and fit for the application planned. customer has to do all necessary testing for the application in order to avoid a default of the application and the product. nxp semiconducto rs does not accept any liability in this respect. export control ? this document as well as the item(s) described herein may be subject to export control regulations. export might require a prior authorization from national authorities. evaluation products ? this product is provided on an ?as is? and ?with all faults? basis for evaluati on purposes only. nxp semico nductors, its affiliates and their suppliers expressly disclaim all warranties, whether express, implied or statutory, including but not limited to the implied warranties of non-infringement, merchantability and fitness for a particular purpose. the entire risk as to the quality, or arising out of the use or performance, of this product remains with customer. in no event shall nxp semiconductors, its affiliates or their suppliers be liable to customer for any special, indirect, consequential, punitive or incidental damages (including without limitation damages for loss of business, business interruption, loss of use, loss of data or information, and the like) arising out the use of or inability to use the product, whether or not based on tort (including negligence), strict liability, breach of contract, breach of warranty or any other theory, even if advised of the possibility of such damages. notwithstanding any damages that customer might incur for any reason whatsoever (including without limitat ion, all damages referenced above and all direct or general damages), the entire liability of nxp semiconductors, its affiliates and their suppliers and custom er?s exclusive remedy for all of the foregoing shall be limited to actual damages incurred by customer based on reasonable reliance up to the greater of the amount actually paid by customer for the product or five dollars (us$5.00) . the foregoing limitations, exclusions and disclaimers shall apply to the ma ximum extent permitted by applicable law, even if any remedy fails of its essential purpose. safety of high-voltage evaluation products ? the non-insulated high voltages that are present when operatin g this product, constitute a risk of electric shock, personal injury, death an d/or ignition of fire. this product is intended for evaluation purposes only. it shall be operated in a designated test area by personnel that is qualified according to local requirements and labor laws to work with non-insulated mains voltages and high-voltage circuits. the product does not comply with ie c 60950 based national or regional safety standards. nxp semiconductors does not accept any liability for damages incurred due to inappropriate use of this product or related to non-insulated high voltages. any use of this product is at customer?s own risk and liability. the customer shall fully indemnify and hold harmless nxp semiconductors from any liability, dam ages and claims resulting from the use of the product. 6.3 trademarks notice: all referenced brands, produc t names, service names and trademarks are the property of their respective owners.
nxp semiconductors an10829 ssl2101 dimmable high efficiency flyback design ? nxp b.v. 2011. all rights reserved. for more information, please visit: http://www.nxp.com for sales office addresses, please se nd an email to: salesaddresses@nxp.com date of release: 22 june 2011 document identifier: an10829 please be aware that important notices concerning this document and the product(s) described herein, have been included in section ?legal information?. 7. contents 1 introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 1.1 application requirements . . . . . . . . . . . . . . . . . 3 1.2 design choices . . . . . . . . . . . . . . . . . . . . . . . . . 3 1.3 ssl2101 ic . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 2 designing the application . . . . . . . . . . . . . . . . . 5 2.1 switched mode power supply (smps) . . . . . . 5 2.1.1 ssl2101 flyback converter operation. . . . . . . . 6 2.1.2 converter frequency . . . . . . . . . . . . . . . . . . . . . 6 2.1.3 primary peak current and primary inductance . 7 2.1.4 turns ratio. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 2.1.5 v cc generation . . . . . . . . . . . . . . . . . . . . . . . . . 8 2.1.6 transformer specification . . . . . . . . . . . . . . . . . 9 2.2 input and output buffer . . . . . . . . . . . . . . . . . . . 9 2.3 bleeder circuit. . . . . . . . . . . . . . . . . . . . . . . . . 11 2.3.1 dimensioning the weak bleeder resistor. . . . . 12 2.4 damper circuit . . . . . . . . . . . . . . . . . . . . . . . . 14 2.4.1 active damper. . . . . . . . . . . . . . . . . . . . . . . . . 16 2.5 oscillator and dimming curve . . . . . . . . . . . . . 17 3 circuit performance. . . . . . . . . . . . . . . . . . . . . 19 3.1 measurement results . . . . . . . . . . . . . . . . . . . 19 3.2 circuit issues . . . . . . . . . . . . . . . . . . . . . . . . . 19 4 conclusion . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 5 references . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 6 legal information. . . . . . . . . . . . . . . . . . . . . . . 21 6.1 definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 6.2 disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 6.3 trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 21 7 contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

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